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FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
CSB
SCLK
CS
SI
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SO
OD15 OD14 OD13 OD12 OD11 OD10 OD9
OD8
OD7
OD6
OD5
OD4
OD3
OD2
OD1 OD0
1. D15:D0 relate to the most recent operation. entry of data into the device.
ordered
2. OD15:OD0 and D15 relate to first most bits of ordered entry fault program status into the LUX of the device.
DO, D1, D2, ... , relate to the the 16 recent ordered
of and data data out IC
Notes
NOTES: 1.
2.
3
Serial Input (SI)
RSTB is in a logic H state during the above
device.
LUX IC
OD0 OD1 OD2 and OD15 relate to the first 16 bits of ordered fault and status data out of the device.
Figure 8. Single 16-Bit Word SPI Communication
Chip Select (CS)
The SI pin is a serial interface command data input pin.
Each SI bit is read on the falling edge of SCLK. A 16-bit
stream of serial data is required on the SI pin, starting with
D15 to D0. SI has a passive pull-down, R DOWN .
Serial Output (SO)
The SO data pin is a tri-state output from the shift register.
The SO pin remains in a high-impedance state until the CS
pin is put into a logic [0] state. The SO data is capable of
reporting the status of the output, the device configuration,
and the state of the key inputs. The SO pin changes state on
the rising edge of SCLK and reads out on the falling edge of
SCLK.
The CS pin enables communication with the master
device. When this pin is in a logic [0] state, the device is
capable of transferring information to, and receiving
information from, the master device. The 35XS3500 device
latches in data from the Input Shift registers to the addressed
registers on the rising edge of CS. The device transfers
status information from the power output to the Shift register
on the falling edge of CS. The SO output driver is enabled
when CS is logic [0]. CS should transition from a logic [1] to a
logic [0] state only when SCLK is a logic [0]. CS has a
passive pull-up, R UP .
STOP Input (STOP)
The STOP input wakes the device. It also controls the Fail
mode activation. The signal is “high active“, meaning the
component is active in case of a logic high at the input.
35XS3500
Analog Integrated Circuit Device Data ?
22
Freescale Semiconductor
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